Phase locked loops are widely used in electronic systems. For example, phase locked loops are widely used in communication systems including but not limited to radio frequency communications systems such as radiotelephones. FIG. 1 is a block diagram illustrating a conventional phase locked loop.
Referring now to FIG. 1, a conventional phase locked loop 100 includes a controlled oscillator 102 such as a voltage controlled oscillator (VCO) that is responsive to a control signal 104, to generate an output signal 106, the frequency of which is a function of control signal. A sinusoidal phase detector 108, also referred to as a multiplier, is responsive to a reference frequency input signal 112 and to the feedback signal 106' to produce an error signal 114. A loop filter 116 filters the error signal 114, to thereby produce the control signal 104 that is provided to the voltage controlled oscillator 102. The loop filter is designed to provide stability at the phase locked loop. Feedback signal 106' is coupled from the VCO output directly or via frequency converter 120 that is responsive to the output signal 106 and to the offset frequency signal 118. The output of the frequency converter may be filtered by a bandpass filter 122. When a frequency converter is used, the phase detector 108 is responsive to the frequency of the output signal 106 as offset by the frequency of the offset frequency signal 118. The design and operation of the phase locked loop 100 and the individual components thereof are well known to those having skill in the art and need not be described further herein.
One of the major concerns in the design and operation of phase locked loops is the rapid acquisition of phase lock. It will be understood that phase lock is generally acquired when the electronic system including the phase locked loop is activated. Phase lock is also generally reacquired when the system is retuned to another channel. In high performance electronic systems, the time allocated for acquisition may not be long enough to establish the phase lock state in the phase locked loop. Moreover, sometimes acquisition may not take place at all if the frequency of the input signal is outside the pull-in range of the phase locked loop. Accordingly, it is known to provide phase locked loop acquisition circuits to decrease the acquisition time for the phase locked loop.
The phase locked loop 100 of FIG. 1 includes a conventional acquisition sweep circuit 140. The acquisition sweep circuit is responsive to an activation signal 144, that is activated upon operation or retuning of the phase locked loop. In response to the activation signal 144, the acquisition sweep circuit 140 produces an acquisition sweep voltage or current 142 that generally is a monotonic function of time. The acquisition voltage or current 142 is added to the error signal 114 using summer 146, to thereby sweep the control signal 104 and thereby acquire lock in the phase locked loop. It will also be understood that although the summer 146 is shown between the phase detector 108 and loop filter 116, the summer 146 may also be placed between the loop filter 116 and the controlled oscillator 102 to sweep the control signal 104. A discussion of phase locked loop acquisition and acquisition sweep circuits may be found at pages 53-91 of "Phaselock Techniques" by F. M. Gardner, John Wiley & Sons, 1979, the disclosure of which is hereby incorporated herein by reference.
Unfortunately, there may be limitations on how rapidly the acquisition sweep voltage or current 142 may sweep. In particular, as described in the aforesaid Gardner reference, it is desired that the rate of change of the output frequency should not exceed .omega..sub.n.sup.2, where .omega..sub.n is the natural loop frequency of the phase locked loop, in view of the sinusoidal characteristic of the phase detector 108. Moreover, it is recommended that the rate of change at the controlled oscillator frequency should be kept below .omega..sub.n.sup.2 /2. Thus, for a high probability of lock during a single acquisition sweep, the rate of change of the frequency of the controlled oscillator 102 should be less than half the square of the natural loop frequency of the phase locked loop. This can enhance the probability of acquiring phase lock, but will also increase the amount of time it takes to sweep acquisition sweep voltage or current 142 for given sweep range.
In order to allow a higher sweep rate, it is known to raise the natural loop frequency of the phase locked loop by increasing the bandwidth thereof. For example, it is known to increase the bandwidth of the phase locked loop during acquisition by providing a switchable loop filter 116 that can have a higher bandwidth during acquisition and a lower bandwidth after acquisition. Unfortunately, a switchable loop filter may introduce a switching transient in response to which the phase locked loop may lose synchronization if the switching transient is an abrupt function of time. Noise, particularly that of 1/f type, may also be introduced into the phase locked loop which can degrade the performance thereof.
It is also known to add automatic frequency and phase control circuits to assist in the acquisition of phase lock. However, these circuits may add undue complexity to the phase locked loop.